1. Field of the Invention
This invention relates to a semiconductor memory device and, more particularly, to a semiconductor memory device which employs memory cells functioning both as DRAM (Dynamic Random Access Memory) and as ROM (Read Only Memory).
2. Description of Related Art
DRAMs are typically arranged with a two dimensional memory cell array constituted of a plurality of memory cells. Each memory cell is accessible by an address input, some digits of which are used for row selection, and the rest of which are used for column selection. To perform such row and column selections, each memory cell is connected to one of the row lines, called word lines, and one of the column lines, known as bit lines.
In a high density memory device, each memory cell has a MOS transistor serving as a transfer gate and a capacitor serving as data storing means. The gate electrode of the MOS transistor is made of one of the word lines. One of the source and drain of the MOS transistor is connected to the one end of the capacitor, whereas the other of the source and drain is connected to the bit line. To read out data from the memory cell, the MOS transistor is turned on by the word line, thereby coupling the capacitor to the bit line so that the charges in the capacitor and the bit line are shared. Then, data in the bit line is amplified by a sense amplifier using another bit line as reference. This amplified data is then transferred to an output circuit through a data line pair, to be read out of the device.
Such DRAMs, though they can be realized with large capacity and low cost production, never keep stored data once the power is turned off. To the contrary, mask ROMs, EPROMs and EEPROMs can keep the stored data even if the power is turned off, but the mask ROMs, among such non-volatile memories, are unable to write the data therein and EPROMs and EEPROMs are unable to read or write the data at a high speed.
Many situations, in the case of designing electronics products, require RAMs and ROMs be used together so as to enjoy the benefits of both types of memories. Specially, when many volatile and non-volatile memories are required, respective memories, such as DRAMs and mask ROMs, are used together. In such a situation, however, there arise the following problems. First, RAMs and ROMs are generally designed to have a capacity of, for example, 256K, 1M, 4M, and so on, and namely, inflexibly available. As a result, especially ROMs are sometimes used in wasteful ways. Second, it is costly to use two types of semiconductor memory devices. Third, the process gap between DRAMs and ROMs is too large to fabricate the conventional type DRAM and ROM on a single chip, thereby causing high cost and requiring longer development time. Fourth, even if the fabrication on a single chip in turn were realized, the resulting chip would be no more than a memory device merely including two different control systems, and the development time for such a memory device would take more than twice as that for an ordinarily organized memory device. Moreover, performance evaluation has to be done separately for the two systems. Fifth, even if the fabrication on a single chip were realized, since different systems are built in one chip, RAM and ROM would have independent fault modes respectively, even after the chip is commercialized in the market, which causes high fault occurrence and complexity of analysis.